SYNC is a custom integrated circuit dedicated to the Muon Detector of the LHCb (Large Hadron Collider beauty) experiment at the CERN LHC.
The SYNC implements the muon functions of the L0 stage and plays a fundamental role in the time alignment of the LHCb Muon Detector and consequently in the trigger performance. The SYNC is realized in IBM 0.25 µm technology, using radiation-hardening layout techniques.
SYNC receives data from the muon detector front-end electronics synchronizing them with the 40.08 MHz LHC clock. The data are tagged with the correct Bunch-Crossing identifier, output to the trigger system and stored in internal memories.
The chip integrates 8 time to digital converters with a resolution up to 1 ns to measure the time phase of the input signals with respect to the system clock period. A histogram block can build real time spectra from the TDCs output. A I2C interface is implemented to configure and control the device, while a JTAG interface is integrated for boundary-scan purpose
For further information, please take a look at the documents below.
- S. Cadeddu, V. De Leo, C. Deplano, A. Lai – “The SYNC Chip in the Electronics Architecture of the LHCb Muon Detector” – IEEE TNS vol. 57:2790-2797, 20105
- S. Cadeddu, V. De Leo, C. Deplano, A. Lai – “Instruments and procedures for time calibration of the LHCb muon detector” – NIM A 589 (2008) 404-414
- S. Cadeddu, V. De Leo, C. Deplano, E. Fois, A. Lai – “Time Calibration of the LHCb Muon System” – 2006 Nuclear Science Symposium 186-189
- S. Cadeddu, V. De Leo, C. Deplano, E. Fois, A. Lai – “The SYNC chip in the front-end electronics of the LHCb muon detector” - 2004 IEEE Nuclear Science Symposium 0-783-8701-5
- S. Cadeddu, V. De Leo, C. Deplano, A. Lai – “DIALOG and SYNC : a VLSI chip set for timing of the LHCb Muon detector”- IEEE TNS vol. 51 n 5 October 2004